Ching-Wei Yeh
Name Ching-Wei Yeh
Email ieecwy@ccu.edu.tw
Office Tel No. 05-2720411#33209
Personal Website http://www.ee.ccu.edu.tw/people/bio.php?PID=866
Research Expertise VLSI CAD、VLSI Design,、Testing and Fault Tolerance
Paper Title Journal Title Authors Year
Towards Process Variation-Aware Power Gating IEEE Transactions on Very Large Scale Integration (VLSI) Systems Ching-wei Yeh, Yuan-Chang Chen, Jinn-Shyan Wang 2012
Design of high-performance CMOS level converters considering PVT variations IEICE Trans. Electronics Jinn-Shyan Wang*, Yu-Juey Chang, and Chingwei Yeh 2011
Heuristic Sizing Methodology for Designing High-Performance CMOS Level Converters with Balanced Rise and Fall Delays IEICE Transactions on Electronics Jinn-Shyan WANG, Yu-Juey CHANG, Chingwei YEH 2010
Year Conference Name Paper Title Authors
2016 GCCE A low-complexity edge-preserved image compression algorithm for LCD overdrive C. Y. Chang, C. H. Huang, H. F. Chen, C. Yeh, Y. S. Chu, and T. J. Lin
2013 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers Self-super-cutoff power gating with state retention on a 0.3V 0.29fJ/cycle/gate 32b RISC core in 0.13µm CMOS Jian-Shiun Chen; Chingwei Yeh; Jinn-Shyan Wang
2013 VLSIC A 0.36V, 33.3μW 18-band ANSI S1.11 1/3-octave filter bank for digital hearing aids in 40nm CMOS J. S. Wang, K. J. Chang, T. J. Lin, R. Wu, and C. Yeh
2012 ISCAS A smart stream controller for efficient implementation of streaming applications on the heterogeneous multicore processor S. H. Ou, C. W. Yeh, T. J. Lin, and C. W. Liu
2012 ASP-DA Complexity-effective Hilbert-Huang transform (HHT) IP for embedded real-time applications S. C. Chen, C. C. Chen, W. C. Guo, T. J. Lin, and C. W. Yeh
Patent Number Patent Title Patent Country Authors
US7,865,025B2 DATA PROCESSING METHOD IN EMBEDDED BLOCK CODING WITH OPTIMIZED TRUNCATION MODULE USA Ying-Jie Xu, Ching-Wei Yeh, Jinn-Shyan Wang